MCU_STM32F4 Target Family Info

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Features Supported

Peripheral Drivers Supported

• Sleep: Support for sending the processor to sleep when no threads/ISRs are executing.
• μs Ticker: Clock peripheral with at least microsecond resolution that Mbed uses to implement Timer and Ticker.
• SPI Controller/Master: Serial Peripheral Interface (SPI) controller/master mode
• SPI Peripheral/Slave: Serial Peripheral Interface (SPI) device/slave mode
• Serial (UART): Support for buffered and unbuffered serial (UART) ports
• I2C Peripheral/Slave: I2C for interrupt-based peripheral/slave mode
• Watchdog: Peripheral which resets the chip if software doesn't service it within a configurable amount of time. Used to guard against software hangs.
• Reset Reason: Support for determining the cause of the most recent MCU reset.
• Legacy Async Serial (UART): Legacy asynchronous serial API via SerialBase
• GPIO Port Input: Driver for reading from an entire GPIO port at a time
• GPIO Port I/O: Driver for using an entire GPIO port as a bidirectional I/O port.
• RTC: Real-Time Clock. Clock which keeps track of real world time, usually using a low frequency, accurate clock.
• PWM Out: Pulse Width Modulation (PWM) generator peripheral driver
• Memory Protection Unit: Mbed supports configuring the MPU on this device to disable writing to ROM and executing from RAM.
• I2C Controller/Master: I2C driver for synchronous (blocking) controller/master mode
• Async I2C Controller/Master: Driver allowing I2C controller mode to be used in the background via interrupts and/or DMA.
• Async SPI: Allows use of SPI controller mode in the background via interrupts and/or DMA.
• GPIO Port Output: Driver for writing to an entire GPIO port at a time
• GPIO Interrupts: GPIO input pin interrupt support
• Analog Inputs: Analog input (ADC) peripheral driver

Boards in this Target Family

Board	MCU Part Number	Extra Features	Extra Peripheral Drivers	Components	RAM Banks	Flash Banks
NUCLEO_F401RE	STM32F401RETx		Low-Precision Ticker, Serial RTS/CTS Flow Control, Flash IAP		SRAM: 96 kiB	ROM: 512 kiB
NUCLEO_F411RE	STM32F411RETx		Low-Precision Ticker, Serial RTS/CTS Flow Control, Flash IAP		SRAM: 128 kiB	ROM: 512 kiB
MTS_DRAGONFLY_F411RE	STM32F411RETx		Flash IAP	Telit HE910	SRAM: 128 kiB	ROM: 512 kiB
MTS_MDOT_F411RE	STM32F411RETx		Low-Precision Ticker		SRAM: 128 kiB	ROM: 512 kiB
BLACKPILL_F411CE	STM32F411CEYx		Low-Precision Ticker, Serial RTS/CTS Flow Control, Flash IAP, USB Device		SRAM: 128 kiB	ROM: 512 kiB
NUCLEO_F412ZG	STM32F412ZGTx		CAN, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device		SRAM: 256 kiB	ROM: 1024 kiB
WIO_EMW3166	STM32F412ZGTx		CAN, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, True Random Number Generator		SRAM: 256 kiB	ROM: 1024 kiB
DISCO_F413ZH	STM32F413ZHTx		CAN, Analog Outputs, Quad SPI, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device	SFDP QuadSPI Flash	SRAM: 320 kiB	ROM: 1536 kiB
NUCLEO_F413ZH	STM32F413ZHTx		CAN, Analog Outputs, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device		SRAM: 320 kiB	ROM: 1536 kiB
NUCLEO_F429ZI	STM32F429ZITx	Arm Platform Security Architecture (PSA)	CAN, Analog Outputs, Flash IAP, Low-Precision Ticker, Ethernet MAC, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device		CCM_RAM: 64 kiB SRAM: 192 kiB	ROM: 2048 kiB
DISCO_F429ZI	STM32F429ZITx		CAN, Analog Outputs, Flash IAP, Serial RTS/CTS Flow Control, True Random Number Generator		CCM_RAM: 64 kiB SRAM: 192 kiB	ROM: 2048 kiB
NUCLEO_F439ZI	STM32F439ZITx		CAN, Analog Outputs, Flash IAP, Low-Precision Ticker, Ethernet MAC, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device		CCM_RAM: 64 kiB SRAM: 192 kiB	ROM: 2048 kiB
NUCLEO_F446RE	STM32F446RETx		CAN, Analog Outputs, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control		SRAM: 128 kiB	ROM: 512 kiB
NUCLEO_F446ZE	STM32F446ZETx		CAN, Analog Outputs, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, USB Device		SRAM: 128 kiB	ROM: 512 kiB
DISCO_F469NI	STM32F469NIHx		CAN, Analog Outputs, Quad SPI, Flash IAP, Low-Precision Ticker, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device	SFDP QuadSPI Flash	SRAM: 320 kiB	ROM: 2048 kiB
SDP_K1	STM32F469NIHx		CAN, Analog Outputs, Quad SPI, Flash IAP, Serial RTS/CTS Flow Control, True Random Number Generator, USB Device		SRAM: 320 kiB	ROM: 2048 kiB

Inheritance Graph