Test Case Output

{{__testcase_start;Test reading analog values with the ADC}}, queued...
[+669ms][CONN][RXD] PWM duty cycle of 0.0% produced an ADC reading of 0.0% (expected 0.0%)
[+720ms][CONN][RXD] PWM duty cycle of 10.0% produced an ADC reading of 10.0% (expected 10.0%)
[+772ms][CONN][RXD] PWM duty cycle of 20.0% produced an ADC reading of 20.1% (expected 20.0%)
[+824ms][CONN][RXD] PWM duty cycle of 30.0% produced an ADC reading of 30.3% (expected 30.0%)
[+865ms][CONN][RXD] PWM duty cycle of 40.0% produced an ADC reading of 40.3% (expected 40.0%)
[+917ms][CONN][RXD] PWM duty cycle of 50.0% produced an ADC reading of 50.6% (expected 50.0%)
[+968ms][CONN][RXD] PWM duty cycle of 60.0% produced an ADC reading of 60.6% (expected 60.0%)
[+1020ms][CONN][RXD] PWM duty cycle of 70.0% produced an ADC reading of 70.5% (expected 70.0%)
[+1072ms][CONN][RXD] PWM duty cycle of 80.0% produced an ADC reading of 80.4% (expected 80.0%)
[+1124ms][CONN][RXD] PWM duty cycle of 90.0% produced an ADC reading of 90.2% (expected 90.0%)
[+1169ms][CONN][RXD] PWM duty cycle of 100.0% produced an ADC reading of 100.0% (expected 100.0%)
[+1180ms][CONN][INF] found KV pair in stream: {{__testcase_finish;Test reading analog values with the ADC;1;0}}