Asynchronous SPI Hardware Abstraction Layer

Functions
bool	spi_master_transfer (spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
	Begin the asynchronous SPI transfer. More...
uint32_t	spi_irq_handler_asynch (spi_t *obj)
	The asynchronous IRQ handler. More...
uint8_t	spi_active (spi_t *obj)
	Attempts to determine if the SPI peripheral is already in use. More...
void	spi_abort_asynch (spi_t *obj)
	Abort an SPI transfer. More...

Detailed Description

Function Documentation

spi_master_transfer()

bool spi_master_transfer	(	spi_t *	obj,
		const void *	tx,
		size_t	tx_length,
		void *	rx,
		size_t	rx_length,
		uint8_t	bit_width,
		uint32_t	handler,
		uint32_t	event,
		DMAUsage	hint
	)

Begin the asynchronous SPI transfer.

Buffer pointers and lengths are specified in tx_buff and rx_buff.

If the device has a data cache, the Tx data is guaranteed to have been flushed from the cache to main memory already. Additionally, the Rx buffer is guaranteed to be cache aligned, and will be invalidated by the SPI layer after the transfer is complete.

Parameters

[in]	obj	The SPI object that holds the transfer information
[in]	tx	The transmit buffer
[in]	tx_length	The number of bytes to transmit
[in]	rx	The receive buffer
[in]	rx_length	The number of bytes to receive
[in]	bit_width	The bit width of buffer words
[in]	event	The logical OR of events to be registered
[in]	handler	SPI interrupt handler
[in]	hint	A suggestion for how to use DMA with this transfer

Returns

True if DMA was actually used for the transfer, false otherwise (if interrupts or another CPU-based method is used to do the transfer).

Note

On MCUs with a data cache, the return value is used to determine if a cache invalidation needs to be done after the transfer is complete. If this function returns true, the driver layer will cache invalidate the Rx buffer under the assumption that the data needs to be re-read from main memory. Be careful, because if the read was not actually done by DMA, and the rx data is in the CPU cache, this invalidation will corrupt it.

spi_irq_handler_asynch()

uint32_t spi_irq_handler_asynch

(

spi_t *

obj

)

The asynchronous IRQ handler.

Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination conditions, such as buffer overflows or transfer complete.

Parameters

[in]

obj

The SPI object that holds the transfer information

Returns

Event flags if a transfer termination condition was met; otherwise 0.

spi_active()

uint8_t spi_active

(

spi_t *

obj

)

Attempts to determine if the SPI peripheral is already in use.

If a temporary DMA channel has been allocated, peripheral is in use. If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA channel were allocated. If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if there are any bytes in the FIFOs.

Parameters

[in]

obj

The SPI object to check for activity

Returns

Non-zero if the SPI port is active or zero if it is not.

spi_abort_asynch()

void spi_abort_asynch

(

spi_t *

obj

)

Abort an SPI transfer.

Parameters

obj	The SPI peripheral to stop